The fabrication of integrated circuits is most cost effective when many circuits, or devices, are simultaneously fabricated on a single semiconductor wafer. This form of batch processing, or wafer processing, allows the cost of each step of the fabrication process to be spread among many devices and reduces the handling that would be required to process each device individually. A typical process flow includes many lithography, deposition, doping, etching, and testing steps. The lithography and testing steps require that the processing equipment be precisely aligned to each device in order to accurately fabricate or probe the very small features of the device. Wafer-level processing allows the processing equipment to align itself to each device on the wafer by aligning to the wafer one time. After the devices on a wafer are fabricated, the devices are tested and the wafer is separated, typically by sawing or breaking the wafer. The individual devices are then packaged, completing the fabrication process.
Dicing debris, comprised of wafer particles and dust, is created when the devices are separated from a wafer. This dicing debris is washed from the surface of the device prior to bonding the device to the package. Micro electronic mechanical systems (MEMS), or micromechanical devices, often have structures that are too fragile to survive exposure to some of the standard device fabrication steps such as device separation and cleanup. The fragile nature of some MEMS requires that the standard IC process steps be reordered to avoid damaging the completed devices. For example, digital micromirror devices and some accelerometers, as described in commonly assigned U.S. Pat. No. 5,061,049 and U.S. patent Ser. No. 07/883,616, have very small structures suspended over electrodes formed on the surface of a silicon substrate. Once these structures are formed and a sacrificial material is etched from the gap between the structure and the electrode, the devices are very fragile. The devices cannot be exposed to liquids, such as would occur during wafer cleanup steps, without risking the destruction of the suspended structures. Therefore, the devices must be separated and the dicing debris washed away before etching the sacrificial material from underneath the mirror.
Separating the wafer before the devices are completed results in extensive device handling during the remaining device fabrication steps such as passivation and device testing. Performing the remaining steps, especially device testing, on individual devices greatly increases the necessary handling and therefore the cost of the completed devices. A need exists for a method and apparatus for breaking and separating semiconductor wafers which eliminates the need to clean the dicing debris. Such a process and apparatus would allow debris sensitive devices to be completely manufactured in wafer form, eliminating the need for costly device level processing.